1. Field of the Invention
The present invention relates to inspection techniques for semiconductor devices, and in particular to a method of inspecting a memory cell of a dynamic random access memory (DRAM) device.
2. Description of the Related Art
A dynamic random access memory (DRAM) device is a kind of a volatile memory device. Digital data storage in a DRAM device is executed by charges and discharges of a capacitor in the DRAM device. When power supplied to the DRAM device is turned off, the data stored in the memory cell of the DRAM device completely disappears. A memory cell in the DRAM device typically includes at least one field effect transistor (FET) and one capacitor. The capacitor is used for storing signals in the cells of the DRAM device.
Off-state currents (Ioff) often happen in memory cells of a DRAM device such that functionality of the memory cells is affected and the fabrication yield of the DRAM device comprising the same is reduced. Therefore, electrical measurements are typically performed to inspect various electrical characteristics of memory cells of the DRAM device. However, these electrical measurements are typically performed after formations of the interconnecting contacts and bitlines thereof, which are later formed after formation of the transistors and the capacitors such that in-time inspection of functionality of the memory cells is not achieved and fabrication costs are increased.